The present invention relates to a semiconductor structure, and more specifically, to a protected through silicon via (TSV) for providing vertical interconnection in a semiconductor structure.
In semiconductor technology, a through-silicon via (TSV) is a vertical electrical connection that passes through a silicon wafer, for example. TSV technology is important in creating 3D packages and 3D integrated circuits. A 3D package may contain two or more semiconductor devices stacked vertically.
The through-silicon via technique may form holes in the silicon wafer by etching, for example, and then fill the holes with conductive materials, such as copper, polysilicon or tungsten to form vias or conductive channels. The wafer may be then thinned to be stacked or bonded together to form a 3D stack of semiconductor devices.
Semiconductor wafers are most commonly silicon. It should be noted however that TSVs may be utilized to pass through semiconductor materials other than silicon such as gallium arsenide. In this case, the TSVs may be referred to more generally as through semiconductor vias, still denoted as TSVs.